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| |
| | =Hardware= | | =Hardware= |
| | [[Image:SmartcardChip1.jpg|thumb|Der Smartcard-Chip ist rot umrandet]] | | [[Image:SmartcardChip1.jpg|thumb|Der Smartcard-Chip ist rot umrandet]] |
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| | </pre> | | </pre> |
| | | | |
| − | Leider gibt es nur eine sehr kurzes 8 seitiges [http://www.infineon.com/cms/en/services/download.html?filename=%2fdgdl%2fSPI_SLE66C24PE_0105.pdf%3ffolderId%3ddb3a304412b407950112b416848b20bf%26fileId%3ddb3a304412b407950112b41684c420c0&location=Products.Chip_Card___Security_ICs.Chip_Card_Controllers.SLE_66_family__Enhanced_High_Performance_Controller.SLE_66C24PE.DOCUMENTS.SPI_SLE66C24PE_0105.pdf PDF] mit Information zum Chip. Nicht einmal die Pinbelegung ist beschrieben.
| + | Neben dem sehr kurzen 8 seitigen [http://www.infineon.com/cms/en/services/download.html?filename=%2fdgdl%2fSPI_SLE66C24PE_0105.pdf%3ffolderId%3ddb3a304412b407950112b416848b20bf%26fileId%3ddb3a304412b407950112b41684c420c0&location=Products.Chip_Card___Security_ICs.Chip_Card_Controllers.SLE_66_family__Enhanced_High_Performance_Controller.SLE_66C24PE.DOCUMENTS.SPI_SLE66C24PE_0105.pdf PDF] mit Information zum Chip, in dem nicht einmal die Pinbelegung beschrieben ist, hat ein Benutzer des Forums noch dieses [http://bettyhacks.com/forum/index.php?action=dlattach;topic=39.0;attach=22 PDF] gepostet. |
| | | | |
| | Anschlussbelegung: | | Anschlussbelegung: |
| Line 29: |
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| | * CPU Pin 40 (XCLK) ist ueber einen externen Frequenzteiler mit dem Takteingang des Chips verbunden. Im Betrieb wird ueber den CPU-Pin der 7,5 MHz Peripherietakt ausgegeben. Durch den Frequenzteiler wird der Takt halbiert. Der Smartcard-Chip wird dadurch mit mit 3,75 MHz getaktet. | | * CPU Pin 40 (XCLK) ist ueber einen externen Frequenzteiler mit dem Takteingang des Chips verbunden. Im Betrieb wird ueber den CPU-Pin der 7,5 MHz Peripherietakt ausgegeben. Durch den Frequenzteiler wird der Takt halbiert. Der Smartcard-Chip wird dadurch mit mit 3,75 MHz getaktet. |
| | | | |
| − | * CPU Pin 75 (TXD1) und CPU Pin 75 (RXD1) sind mit dem Daten Pin verbunden. Die Datenrate ist 1/64 der Taktfrequenz, also 58593,75 Bit/s und somit nahe an der von einem PC unsterstuetzen Baudrate von 57600 Bit/s (nur ca. 1,7% Abweichung). | + | * CPU Pin 75 (TXD1) und CPU Pin 76 (RXD1) sind mit dem Daten Pin verbunden. Die Datenrate ist 1/64 der Taktfrequenz, also 58593,75 Bit/s und somit nahe an der von einem PC unsterstuetzen Baudrate von 57600 Bit/s (nur ca. 1,7% Abweichung). Neben der Baudrate ist die Parität auf Even sowie 2 Stopbits einzustellen. |
| | | | |
| − | Zum Experimentieren kann man den Chip ausloeten und z.B. mit dem Mastermouse-Interface verbinden. Die andere Seite des Interfaces wird an die serielle PC Schnittstelle angeschlossen. Jetzt kann man mit einen Programm wie z.B. WinExplorer Kommandos an den Chip schicken und die Antworten auswerten. Dadurch laesst sich das Ã?Ã?bertragungsformat herausfinden und man kann eine Kommandoliste aufstellen. | + | Zum Experimentieren kann man den Chip ausloeten und z.B. mit dem Mastermouse-Interface verbinden. Die andere Seite des Interfaces wird an die serielle PC Schnittstelle angeschlossen. Jetzt kann man mit einen Programm wie z.B. WinExplorer Kommandos an den Chip schicken und die Antworten auswerten. Dadurch laesst sich das Uebertragungsformat herausfinden und man kann eine Kommandoliste aufstellen. |
| | | | |
| | =ATR= | | =ATR= |
