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Channel 1 und IDs 0/1
LIBPATH = $(ARMBASE)/lib/gcc/arm-elf/4.1.1/interwork
$(LD) $(ROMLDFLAGS) -L$(LIBPATH) -o.... -lgcc
drawIconExt (ix, LCD_SIZE_Y-1 - h,
iconList [i]->data,
iconList [i]->width, iconList [i]->height, ICON_GRAY,
LCD_COLOR_B, DRAW_NORCU);
drawIcon (ix, LCD_SIZE_Y-1 - h, iconList [i], LCD_COLOR_B, DRAW_NORCU);
///////////////////////////////////////////////////////////////////
// ICON can be defined in the appropriate C file before
// including that header or the related icon files to define the
// actual type of the icon structure:
//
// >> #define ICON iconElement_t
//
///////////////////////////////////////////////////////////////////
#ifndef ICON
#define ICON icon_t
#endif
///////////////////////////////////////////////////////////////////
// ICON_INFO can be defined in the appropriate C file before
// including that header to save one byte in the icon structure:
//
// >> #define ICON_INFO(i)
//
///////////////////////////////////////////////////////////////////
#ifndef ICON_INFO
#define ICON_INFO(i) /* info = */ i,
#define ICON_INFO_ELEMENT unsigned char info; // additional one byte (iconType_t might be larger)
#endif
#ifndef ICON_INFO_ELEMENT
#define ICON_INFO_ELEMENT
//#define ICON_IS_GRAY(i) 0
#define ICON_IS_GRAY(i) (sizeof(i.data) > (i.height/8 + (i.height%8 ? 1 : 0)) * i.width + 2);
#else
#define ICON_IS_GRAY(i) ((i)->info >= ICON_GRAY)
#endif
//-----------------------------------------------------------------------------
#undef ICON_INFO
#define ICON_INFO(i)
#undef ICON_INFO_ELEMENT
#define ICON_INFO_ELEMENT
#undef ICON
#define ICON iconElement_t
#include "iconFr.h"
#include "iconPlay.h"
#include "iconPause.h"
#include "iconStop.h"
#include "iconFf.h"
Warn : srst pulls trst - can not reset into halted mode. Issuing halt after reset.
void cpu_idle ()
{
/* fall through if a key was pressed */
if (ANYKEY)
return;
#
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME lpc2220
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x4f1f0f0f
}
#coonfigure reset options
jtag_nsrst_delay 50
jtag_ntrst_delay 50
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst trst_push_pull srst_push_pull
jtag_khz 1000
#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
# Event handlers
$_TARGETNAME configure -event reset-start {jtag_khz 1000}
$_TARGETNAME configure -event reset-init {betty_init}
arm7_9 dcc_downloads enable
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0
#flash bank <name> <driver> <base_addr> <size> <chip_width> <bus_width> <target_number> [<target_name> <banks> <sectors_per_bank> <pages_per_sector> <page_size> <num_nvmbits> <ext_freq_khz>]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x80000000 0x00100000 2 2 $_TARGETNAME
flash bank $_FLASHNAME cfi 0x82000000 0x00100000 2 2 $_TARGETNAME
arm7_9 fast_memory_access enable
proc betty_init { } {
# setup PLL
# PLLCON: Enable PLL, connect PLL
mww 0xe01fc080 0x03
# VBPDIV: no division
mww 0xe01fc100 0x02
# PLLCFG: 0x42 = psel = 10 (4) = msel= 00010 (3) = 240 mhz Fcco*/
mww 0xe01fc084 0x42
# Activate PLL settings
#mww 0xe01fc08c 0xaa
#mww 0xe01fc08c 0x55
#sleep 100
# Memory Bank Configuration
# BCFG0: 16bit, rble, 2wst - 30 mhz : Betty: FLASH 0 @ 0x80000000
mww 0xffe00000 0x10000420
# BCFG2: 16bit, rble, 2wst - 30 mhz : Betty: FLASH 1 @ 0x82000000
mww 0xffe00008 0x10000420
# BCFG1: 8 bit, 3 sram wst, rble, 5 wst 3 idcy : Betty: LCD @ 0x81000000
#mww 0xffe00004 0x00000400
# GPIO Pin COnfiguration for Flash access
# PINSEL0:
mww 0xe002c000 0x00008005
# PINSEL1:
mww 0xe002c004 0x00000000
# PINSEL2:
mww 0xe002c014 0x0de049d4
# IO2SET: Set Outputs
mww 0xe0028024 0x1FC0000
# IO2DIR: Set Direction
mww 0xe0028028 0x1FC0000
# IO0DIR:
mww 0xe0028008 0x002018D0
# disable watchdog
#mww 0xfffffd44 0x00008000
# enable user reset
#mww 0xfffffd08 0xa5000001
}
proc flash_boop {IMAGE} {
reset init
flash erase_sector 0 0 last
flash write_bank 0 $IMAGE 0
reset run
}
# For more information about the configuration files, take a look at:
# openocd.texi
Das Flash selbst sollte via CFI erkannt werden, ob openocd das flashen direkt, bzw. mit einer Helper-Routine im RAM unterstützt, weiß ich (noch) nicht.
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_push_pull
#trst_push_pull srst_push_pull
richtige Kondensatoren genommen? Auf den 1µF müsste 150 stehen, auf dem mit 100µF müsste 107 stehen. Sind diese Werte kritisch? Hab sie nah an den MAX gelötet
Muss ich also zusätzlich zum Festspannungsregler (5V) für den Max232 noch einen 3,3V für die Ferbedienung einbauen?
Aber der Max232 wird ja wohl nicht mit nur 3,3V laufen